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Adaptive Control of a Step-Up Full-Bridge DC-DC Converter for Variable Low Input Voltage Applications Elton Pepa Thesis submitted to the faculty of the Virginia Polytechnic Institute and State University in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering Approved: ____________ok_________________ Dr. Jason Lai (Chair) ____________________ Dr. Krishnan Ramu ____________________ Dr. William T. Baumann February 6, 2004 Blacksburg, Virginia Keywords: adaptive control, phase shift modulation, full bridge, converter Copyright 2004, Elton Pepa

Adaptive Control of a Step-Up Full-Bridge DC-DC Converter for Variable Low Input Voltage Applications By Elton Pepa Electrical Engineering Abstract This thesis shows the implementation of a novel control scheme DC-DC converter. The converter is a phase-shifted full-bridge PWM converter that is designed to operate as a front stage of a power conversion system where the input is a variable low voltage high current source. The converter is designed to step-up the low voltage input to an acceptable level that can be inverted to a 120/240 VAC 60Hz voltage for residential power.

A DSP based adaptive control model is developed, taking into account line variations introduced by the input source while providing very good load dynamics for the converter in both discontinuous and continuous conduction modes. The adaptive controller is implemented using two voltage sensors that read the input and the output voltages of the converter. The controller’s bandwidth is comparable to current mode control, without the need for an expensive current sensor, yet providing the noise immunity seen in voltage mode controllers. The intended input source was a fuel cell but in its absence a DC supply is utilized instead.

The system is simulated for both discontinuous and continuous conduction modes and implemented and demonstrated for the continuous conduction mode. The test results are shown to match the simulation results very closely. Acknowledgements First and foremost, I want to express my sincere gratitude to my advisor, Dr. Jason Lai, for his guidance, encouragement, and support during my graduate studies. His practical way of teaching, his impressive knowledge, technical skills, and creative thinking have been a source of inspiration throughout the course of my work. I am grateful to my other committee members, Dr.

Krishnan Ramu and Dr. William T. Baumann. Dr. Ramu has shown his cheer, support, and advice to me from the moment I considered starting my graduate studies. The lectures, long conversations with him, and the guidance he has given me are invaluable. Dr. Baumann’s teachings of control systems have been some best lectures I have ever received during my entire school studies. My work would have not been possible without the help of a number of my fellow students. I would especially like to thank Jerry Francis for his support and help with the DSP work, testing, and great friendship.

I am extremely grateful to: Chris Smith, Damian Urciuoli, Andy Mclandrich, Amy Johnson, Mike Gilliom, Mike Schenck, and Joel Gouker, all of whom I spent countless late nights and early mornings working on the FEC competition; Xudong Huang, who was my partner in the Delphi project; and other FEEC students including Changrong Liu, Huijie Yu, Junhong Zhang. There are also some past and present CPES students and friends including Lincoln, Troy, Jeremy, Leonard, Carl, Daniel, Doug and Sebastian that are deserving of my appreciation.

Additionally, I would like to thank my good friends from the Albanian Club at Virginia Tech, who to some extent have eased the longing I have for my family and friends back home. Most importantly, I would like to thank my parents and my brother for everything that they have done for me throughout my life and the joy they have brought to me for just having their support. I only hope that what I have accomplished can pay somewhat for the efforts for raising and making me the person that I am today. Finally, I would like to express a great amount of gratitude to my girlfriend, Carrie, for her companionship and for being the most supportive. ii Table of Contents

FEC is a competition between universities around the country and abroad primarily supported by the Department of Energy (DOE) and the Department of Defense (DOD). With the energy use rising every year and as the country becomes more dependent on foreign oil, it is in the focus of DOE to develop alternative renewable sources. One of the competitions in FEC was the Fuel Cell Inverter challenge, with the objective to develop a low-cost power processing system that supports the commercialization of a 5 kW solid-oxide fuel cell (SOFC) power generation system to provide non-utility and ultra clean residential electricity.

One of the objectives of the VT team was to complete a control system that would meet the requirements set by the competition. However, due to time restrictions, a complete control system design was not implemented by the time the competition was held. The focus of this study was to design a high performance controller for a frontend DC-DC converter to be used in a variable low voltage input power conversion system similar to the FEC requirements. Since at the time of FEC competition and when the work in this thesis was conducted a SOFC was not available, a variable DC supply was utilized instead.

The control method presented here is an individual effort to complete the work from the FEC, surpassing the given requirements. 1 1. 2 Objective and Outline The focus of this thesis is in the conversion of an unregulated low voltage high current input source to a useful source of energy that can be used directly by consumers. As mentioned before, the intended primary energy source from the FEC [1] was a solid oxide fuel cell which in this thesis was replaced by a DC supply that can vary the input voltage in a fashion similar to a fuel cell.

In the FEC, the variable DC input voltage was to be converted to two single phase 120 VAC outputs that can be combined to produce a 240VAC, 60 Hz output. Such conversion was done in two stages. First, the nominal voltage of 28VDC input from the DC source is boosted to a 200VDC bus voltage that can be inverted by a single phase inverter to the desired 120/240VAC outputs. The main requirements for the FEC competition are listed in Table 1 [2]. Table 1. Main design requirements for FEC 2003 Design Item 1. Manufacturing Cost 2. Output Power Capability-nominal 3.

Output Power capability overload 4. Output Voltage 5. Input Source (SOFC) 6. Galvanic isolation Target Requirement Less then US $40/kW for the 10 kW design in high volume production 5 kW continuous 10 kW overload for 1 minute (5kW from fuel cell) 120 V/ 240 V nominal 22-41 VDC, 29 V nominal Galvanic isolation of the system. The common neutral point of the ac output phases must be earth ground > 90% 7. Overall Efficiency To achieve these cost and efficiency targets, the hardware had to be designed from the bottom up, eliminating expensive components with cost-effective solutions.

This energy management system has three main parts: the front-end DC-DC converter, the AC inverter and energy storage elements. The system block diagram designed for the FEC 2003 is shown in Figure 1. 1. This report focuses on the front end DC-DC which is an important link between the low voltage high current unregulated input voltage source and the 60 Hz inverter. 2 Input Fuel DC Cell (SOFC) source DC-DC Converter DC link DC-AC Inverter 120/240V Load Bi-directional Converter DC Q1 I A Q3 Q4 Llk B Lf Cf Q2 DC- DC XFMR Rload Battery System Figure 1. 1. Basic block diagram of the power conversion system

The solid-oxide fuel cell that was used as the basis for designing the DC-DC converter, has a voltage-current characteristic, also known as the polarization curve, given in Figure 1. 2 Figure 1. 2. Voltage to current plot of a solid oxide fuel cell (SOFC) According to the power plot Figure 1. 2 , the front end DC-DC converter is required to operate at low-voltage high-current at heavy load, and high-voltage-low current at light load conditions. In order to provide a bus voltage large enough for a 120/240V inverter, the input voltage must be boosted significantly.

For this application, an isolated topology is favored for converter optimization [3]. Isolated converter topologies provide 3 advantages in applications requiring large voltage conversion ratios. Transformer isolation can reduce switch and diode device stresses and allows multiple windings or taps to be used to for multiple converter outputs. The full-bridge is a popular design for both buck and boost applications and has become a basis for numerous resonant zero voltage and zero current switching (ZVS, ZCS) schemes.

Often in high power applications a phase shift modulation (PSM) switching scheme is used to achieve ZVS and/or ZCS transitions through the interaction of converter parasitic energy storage elements [4]. Another advantage for using the full bridge converter is the fact that when higher power application are requested the full bridge converter can act as a modular block and that it is possible to stack up [5]. For this purpose the chosen topology for the converter to be used in this application is a Full bridge phase shifted PWM converter.

The DC-DC converter discussed herein provides a favorable method of boosting the low DC voltage high current input DC for an inverter input. For sufficient inverter input voltage margin, a 200 V converter output was desired for the entire fuel cell input voltage range. To meet these criteria, the converter consists of a switching stage, a transformer stage, and an output rectifier and filter stage Since the input source is unregulated, the DC-DC converter has to take into account these changes and act appropriately without affecting the output.

The output from the DC-DC converter creates the DC link bus voltage. The DC link bus voltage created by the converter needs to be stiff because it is being used by single phase inverter and a bi-directional converter. The converter’s output should respond to the load dynamics and still maintain good regulation. The rest of this chapter gives an overview of the system and different control methods that are used in power converter designs and lays some of the foundations of the adaptive control model that is developed in this thesis.

Chapter 2 presents an overview of the design options and discusses in more detail the challenges that arise when a high performance controller is required for the DC-DC converter in the power conversion system application. In chapter 3 the models for the chosen converter topology and the control scheme are developed. This includes the design of a closed loop control for the full bridge converter based on an adaptive model reference scheme that has a very good disturbance rejection and bandwidths comparable to current mode control methods. In 4 his chapter, the design of the controller is simulated under different load and input voltage conditions. Next, in chapter 4 the design of the hardware and software implementation is discussed. Experimental results are taken and the performance of the converter is compared with the predicted simulation results. Finally, a summary of the design is given, the conclusions are drawn, and future work ideas are presented. 1. 3 Background Information In this section a literature review, on the basic operation of the fuel cells, converters and the control techniques most commonly used is provided.

In addition a special section is dedicated to adaptive control from which much of the thesis was based upon. 1. 3. 1 Fuel Cells Fuel cells are ideal for distributed power generation applications, environmentally friendly, efficient and desirable for remote locations and developing countries as a mean of providing power at a low cost. Fuel cells are classified by the electrolyte that they employ and the temperature of operation. Solid oxide fuel cells (SOFC) [6] operate at high temperature and the oxygen from air is the oxidant (cathode fuel). SOFCs are solidstate devices operating at temperatures up to 1000°C.

They can use a wider choice of fuels and there is no requirement to manage liquid electrolytes. Current is conducted by the movement of oxygen ions through a solid electrolyte. At the cathode, oxygen is reduced to form oxygen ions; at the anode, the transported oxygen ions react with the gaseous fuel to produce water and free electrons for the external circuit. In the case of SOFCs, the temperature has to be high enough to enable oxygen ions to defuse through the electrolyte, which is made possible by the presence of oxygen vacancies in the crystalline structure of the electrolyte.

The efficiency of SOFC is in the 50-60%, and although still at a relatively early stage of development, they are regarded as the most promising for generating electricity from hydrocarbon fuels [6]. A fuel cell system consists of the following main stages: • • • • Fuel Processing Water management Temperature Control Power Conditioning 5 The power conditioning that is made up of power electronics is the focus in this thesis report. The fuel cell output is in the form of direct current (DC) and the output voltage depends on the stack size.

In many applications, alternating current (AC) at higher voltages is required; therefore fuel cell output is transformed from DC to AC by means of power electronics. Different circuit topologies were considered for this application and the design was done in three stages: 1. DC-DC converter 2. DC-AC inverter 3. Bidirectional battery charger Since the SOFC is used as an input source, the input voltage into the DC-DC converter is 22-31 VDC at a 28 VDC nominal voltage, and a maximum current of 275 A from the fuel cell. The whole system needs to provide galvanic isolation from the input to output for the purpose of safety [2].

Given that the input voltage is low and the required voltage of the whole system is 120V/240 VAC nominal, the main purpose of the DC-DC converter is to provide a sufficient DC link voltage which will be inverted into AC by the inverter. 1. 3. 2 Control of DC-DC Converters The structure and complexity of the converter control depends on specific application requirements. A cascaded loop control structure with an inner current loop and a superimposed voltage loop is used as a standard control in DC-DC converters to provide high performance, wide bandwidth output voltage regulation [7].

In all switching converters the output voltage v(t) is a function of input line voltage vg(t), duty cycle d(t), and the load current iload(t) as well as the converter circuit element values. In DC-DC converter applications it is desired to obtain a constant output voltage v(t) = V in spite of the disturbances in vg(t) and iload(t) (Figure 1. 3), and in spite of variations in the converter circuit element values. The unknown and unmeasurable variations of the process parameters degrade the performance of the control system.

Feedback is used in conventional control systems to reject the effect of the disturbances upon the controlled variables and to bring them back to their desired values. To achieve this, first the controlled variables are measured then 6 compared with the desired values and the difference is fed into controller which will appropriately control these variables to meet the desired specifications. 1. 3. 3 Voltage Mode Control A feedback loop can be constructed for regulation of the output voltage. The output voltage v(t) is compared to a reference voltage Vref, to generate an error signal [3, 8].

This error signal is applied to the input of a compensation network, and the output of the compensator drives the control signal d(t) as shown in Figure 1. 3. In the case of a full bridge converter, the control signal d(t) is given to a full bridge controller IC which in this case is implemented by the Texas Instruments UCC3895 [9]. This control IC generates the appropriate turn on signals for all four switches in the pattern explained in chapter 2. vg (t ) Lf Q1 I DC Q3 Q2 DC-DC XFMR H(s) Q1 Q2 Q3 Q4 Sensor Gain Cf Q4 Llk v(t ) Vout load (t ) Rload Phase Shift PWM Controller (UCC3895) d(t) GC (s ) Compesator Error Signal Figure 1. 3. Voltage Mode Control In voltage mode control any change in the source or load is only detected after it has propagated to the output. This slows the control, especially when the source voltage changes as in the case when the input source is a SOFC. Vref 7 1. 3. 4 Current Mode Control Another control scheme that finds a wide application is current mode control. In this type of control the inductor current is used as a feedback state [10].

However the current and voltage reference values are not independent and this specifically requires knowledge of the load [7]. To overcome this obstacle the voltage error signal is used to generate a current error signal as shown in Figure 1. 4 [11]. Using the current creates the drawback that the knowledge of how the current affects the voltage is needed. For example, in a resistive system, v=ir, and increasing v will increase i. However, in a constant power load, increasing v will decrease i to maintain the relationship iv=p, where p is typically constant.

This means that the current reference should be smaller for larger voltages. This dependency in undesired, and is a drawback of this type of control. Misrepresenting the load can lead to decreased performance, and possibly instability. Vref + kv _ + ki _ Converter IL Vout Figure 1. 4. Current Mode Control Current mode control requires knowledge of the inductor current, which is controlled via the inner loop. The outer loop manages the output voltage error by commanding the necessary current. The inner loop makes the converter act as a current source. There are many schemes that deal with current mode control.

There are many methods to use to do current mode control, such as peak current mode control [12], average current mode control [13], sensorless current mode control [14]. In this thesis a brief overview of the main schemes is described. 8 1. 3. 5 Peak Current Mode Control Figure 1. 5 shows the generic inductor current of a switching converter operating in continuous conduction mode (CCM). The inductor current changes with a slope m1 during the first subinterval, and a slope –m2 during the second subinterval. At D > 0. 5 there is an inherent instability which is not dependent of the converter topology [3].

The controller can be made stable for all duty cycles by the addition of an artificial ramp with a slope Ma to the sensed current waveform. When M a ? 0. 5 ? m2 , then the controller is stable for all duty cycles. The controller now switches the transistor off when this summation crosses the reference value iref, as shown in Figure 1. 5. [12]. The relationship between the ramp, inductor and reference current is given in (1) ia (dT ) + iL (dT ) = iref (1) L iL Converter duty Clock S SET Q ? Ma iref iref ? ia ? m2 iL iref + _ Ramp m1 + _ iL ON OFF R CLR Q ON OFF ia Figure 1. 5. Peak current mode control

Some benefits of peak current mode control are: • • • Control of the peak inductor current Inherent current limiting and sharing Good dynamics and performance Some of the limitations are: • Limited accuracy in controlling the average inductor current (especially in the DCM case) (The peak and average inductor current are not related) • • Increased sensitivity to line variations Increased switching noise problems 9 1. 3. 6 Average Current Mode Control In the average current mode control (ACM) a compensator is added to make the average inductor current track a reference as shown in Figure 1. [13] . The triangle carrier waveform in this case remains in place. In this case the variations in the duty cycle are dependent on the value of the averaged current. L iL Converter duty Clock iL iref + _ Ramp GC (s ) + _ S SET Q R CLR Q ia Figure 1. 6. Average Current Mode Control (ACM) 1. 3. 7 Sensorless Current Mode Control An alternative method for current mode control is to use an observer method. In an observer, a model of the system to be controlled is used in place of the system to provide estimates of the control state values.

In the case of sensorless current mode control an observer state is used in the place of inductor current. Since the output should match the reference, the output is a command rather than a dynamic state. So the desired output reference value replaces the output state. The SCM signal can be used as a direct substitute for peak current mode control. It shares the two key properties of the current mode controls and it provides a direct match to peak current mode control [15]: • • It compensates for changes in the input source It requires a stabilizing ramp to reach duty ratios above 50%. 10

This method, however, has its disadvantages: • Since an integration step involves an arbitrary constant, the average DC current is not controlled • • For current limiting or current sharing some extra control is needed The general version requires an analog representation of the switches or other means to create the observer, as shown in Figure 1. 7. v1 q1 L v3 q4 q2 q3 Vout v2 v1 v2 q2 Switching q1 + + vL q4 Vref ?? vI PWM Controller q3 v3 – Figure 1. 7. General SCM Process In summary, the sensorless current mode (SCM) control uses the integrated inductor voltage as shown in Figure 1. in place of measured inductor current, and substitutes an intended command reference for the states intended to be fixed. The approach is based on an observer, which emulates the converter’s operation. To implement the general form, low power switches are added to the PWM IC in order to support the method. 11 L iL Converter duty Clock SET Ma VI + _ Ramp S Q m2 R Q ? m1 VI CLR ON OFF ON OFF ON Figure 1. 8. Sensorless Current Mode Control 1. 3. 8 Adaptive control In the nature of the application, the input source varies with time and its response is highly dependent on external factors.

For DC-DC converter to achieve a good output control independent of the line input and load type, other types of control techniques are studied. These methods are highly beneficial in the case when the parameters of the control process are poorly known or vary during normal operation. With PCM, ACM and SCM control techniques the inductor current/voltage needs to be measured and the selection of the ramp control signal needs to be done such that the controller is stable throughout the duty cycle range. In most DC-DC converters, the inductor current is a function of the load current.

The converter’s operation changes from continuous conduction mode CCM, to discontinuous conduction mode (DCM) when the inductor ripple current is higher than the average value. In DCM, the properties of the converter change radically. The conversion ratio, M, becomes load dependent and the output impedance increases. As a result the control to output transfer function (duty to output voltage) may be unknown when the load is removed. The control method used in this work is a variation of the adaptive control techniques, which provide a systematic approach for automatic adjustment of the controllers in real time [16].

This method is preferable in order to achieve or maintain a desired level of performance of the control system when the parameters of the plant dynamic model are unknown and/change with time. 12 The plant (DC-DC converter) dynamic characteristics depend upon the load and the input line. In order to achieve and maintain acceptable level of performance when changes in the model occur, adaptive control has to be considered. In order to design a good controller the following is needed: • • Specification of the desired control loop performances Knowledge of the dynamics model of the plant to be controlled

Among various alternative methods, the technique known as adaptive model reference seems to be one of the most feasible approaches for this application [17]. It should be noted that the control system under consideration is an adjustable dynamic system in the sense that its performance can be adjusted by modifying the parameters of the controller or the control signal. The difference between the desired performance and the measured performance (the error) acts through an adaptation law to force the model to match the real system.

A general block diagram of the adaptive control is shown in Figure 1. 9 Plant Vref ? + Controller d Model Ym + ? Adaptation Law Figure 1. 9. Basic configuration of an adaptive model 13 Chapter 2 – FB-ZVS Converter Model in DCM & CCM 2. 1 Principle of operation In order to reduce the size and the weight of magnetic components it is desirable to increase the switching frequency for DC-DC converters. When conventional PWM converters are operated at high frequencies, the circuit parasitics have negative effects on the converter performance [18].

Switching losses increase in high power applications and snubbers and/or other means of protection are required, which introduce significant losses and lower the efficiency. In the case of the conventional full bridge converter, the diagonally opposite switches (Q1 and Q2, or Q3 and Q4) are turned on and off simultaneously as shown in Figure 2. 1. In the FB-PWM converter, when all four switches are turned off, the load current freewheels through the rectifier diodes [19]. In this case the energy stored in the leakage inductance of the power transformer causes severe ringing with MOSFET junction capacitances.

This creates the need for using snubbers that increase the overall losses bringing down the efficiency. If snubbers are not used, the selection of the devices becomes more difficult as the voltage rating for these switches has to be much higher. As the voltage rating goes up, so do the conduction losses and as a result the overall losses increase. At the same time the cost increases as well. In order to minimize the parasitic ringing, the gate signals of Q2 and Q4 are delayed (phase-shifted) with respect to those of Q1 and Q3 [20], as shown in Figure 2. , so that the primary of the transformer is either connected to the input voltage or shorted. The leakage inductance current is never interrupted, thus solving the problem of parasitic ringing associated with the conventional full-bridge PWM converter. The energy stored in the leakage inductance can be used to discharge the energy stored in the MOSFET junction capacitances to achieve zero voltage switching (ZVS) conditions for all four switches in the primary side. In this case, the converter requires no additional resonant components. 14 Lf Q1 I Q2 DC-DC XFMR Q4 Llk B DC Q3 A Cf

Rload Q1 Q2 Q3 Q4 D ? TS 2 V AB Figure 2. 1. Conventional FB-PWM Converter 15 Lf Q1 I Q2 DC-DC XFMR Q4 Llk B DC Q3 A Cf Rload Q1 Q2 Q3 Q4 D ? TS 2 V AB Figure 2. 2. Phase Shifted FB-PWM Converter 2. 2 Converter Analysis The FB-ZVS-PWM converter provides ZVS for all four switches in the bridge. However the mechanism by which ZVS is achieved is different for both legs of the bridge Figure 2. 3. For transistors Q2 and Q4, the ZVS is provided by the resonance between the leakage inductance, LLK and the output capacitance of the switch. 16 Lf Q1 I Q2 Q4 Llk B Vin Q3 A + Vs DC-DC XFMR Cf

Rload Ip I2 I1 I t1 t2 t3 t4 t5 t6 t7 t8 Q1 Q2 Q2 D3 D1 Q4 D1 D2 D3 D4 VAB Q3 Q4 Vs Figure 2. 3. Principle of Operation of Phase Shifted FB-PWM Converter The needed energy for achieving ZVS is given in . E= 1 4 1 2 2 2 ? LLK ? I 2 ? ? Cmos ? Vin + ? CTR ? Vin 2 3 2 (2) In equation22 (2) I 2 is the current through the primary when Q2 turns off, Vin is the input voltage CTR is the transformer winding capacitance. The factor 4/3 is the two times the energy stored in the nonlinear drain to source capacitor, whose capacitance is inversely proportional to the square root of the voltage [20].

The resonance between LLK , C mos and CTR provides a sinusoidal voltage across the capacitances that reaches a maximum at one fourth of the resonant frequency period. 17 The dead time between Q2 and Q4 has to be set at ? t max to ensure that there is sufficient time to charge and discharge the capacitances the dead time required to ensure ZVS with the maximum possible load range can be determined by the following equation (3): ? t max = Where C = C mos + CTR T ? = 4 2 LLK ? C (3) Whether ZVS can be achieved for Q2 and Q4 is dependent on the load level of the converter.

For light loads, the current though LLK when Q2 and Q4 are turned off may not be enough to turn on the anti-parallel diode. For switches Q1 and Q3, ZVS is provided by a different mechanism. Before Q1 is turned off the current in the primary is reaching its peak value. The primary current is the filter inductor current reflected to the primary. When Q1 is turned off the energy available to charge the output capacitance of Q1 and discharge the output capacitance of Q3 is the energy stored in LLK and the energy in the output filter inductor.

This energy in the output filter inductor is available because the filter inductor current does not freewheel through the rectifier until the voltage across the secondary has fallen to zero. Since the energy in the filter inductor is large compared to the energy stored in the switch capacitances in the primary, the charging of the switches can be approximated by a linear charging with a constant current. Consequently, the dead time dt1 required between the turn off of Q1 and turn on of Q3 can be determined from the equation (4): dt1 ? I p = 4 ? Cmos ? Vin (4)

Where 4 ? Cmos ? Vin corresponds to twice the charge stored in the nonlinear output capacitance of the MOSFET and I p is the peak current in the output filter inductor reflected to the primary. The dead time can be calculated for the minimum I p chosen to achieve ZVS. If load current is further reduced the ZVS property can not be maintained. 18 -Critical Current for Zero-Voltage Switching The ZVS for Q1 and Q3 can be achieved even at light loads because D1 and D3 can always be turned on by the energy stored in the output filter inductance. However, ZVS for Q2 and

Q4 can only be achieved for a load current above the critical values it is shown in equation (5): I CRIT = 2 LLK 1 ? 4 2 2? ? ? ? CMOS ? Vin + ? Ctr ? Vin ? 2 ? 3 ? (5) The available current through LLK at t2 can be calculated by: I2 = NS NP ? VOUT T? ?I ? ? I load + ? (1 ? D) ? ? 2 LLK + LF 2? ? ? (6) Finally, ZVS is achieved for a load current so that I2>Icrit which can be expressed as: I load ? VOUT ? I NP T ? I CRIT ? + ? (1 ? D) NS 2 LLk + LF 2 (7) The magnetizing current can only be used to achieve ZVS when the load current reflected to the primary is lower than the magnetizing current (i. . at light loads) [20]. For such light loads the energy available to charge/discharge the output capacitances of the switches Q2 and Q4 at times t2 and t6 respectively (Figure 2. 3) is the energy stored in the transformer’s leakage inductance plus the energy stored in the leakage inductance of the transformer. 2. 2. 1 CCM and DCM Operation DCM occurs with large inductor current ripple in a converter operating at light load and containing current-unidirectional switches. Since it is usually required that converters operate at no load, DCM is frequently encountered.

The properties of the converter change radically in the discontinuous conduction mode. The conversion ratio M becomes load dependent and the output impedance is increased. Control of the output may be lost when the load is removed [3]. The average inductor current is related to 19 output voltage and resistance load by Ohms law in (8) and the inductor current ripple can be determined by equation (9) I= V R (8) ?iL = (n ? Vg ? V ) 2L D ? TS (9) The ripple magnitude depends on the applied voltage (n·Vg – V), the inductance value, and on the transistor conduction time DTs.

However, the ripple does not depend on the load resistance R. The inductor current ripple magnitude varies with the applied voltages rather than the applied currents. If the load resistance is increased so that the DC load current is decreased, the ripple magnitude ? iL , will remain unchanged. If the load resistance increases there will be a point when I = ? iL is reached. As the load is decreased, the diode current can not be negative therefore the diode must become reverse biased before the end of the switching period. This is what is known as discontinuous conduction mode (DCM).

The conditions for operation in the discontinuous conduction modes are given by equations (10) and (11): I > ? iL For CCM I < ? iL For DCM (10) (11) Where I and ? iL are found assuming that the converter operates in the continuous conduction mode. In DCM: D ? n ? Vg D ? D’? TS ? n ? Vg ;lt; R 2? L (12) Simplified, this leads to 2? L ;lt; D’ R ? TS 2? L and R ? TS (13) Equation (13) can be expressed as K < K crit (D) where K = K crit ( D) = D’ . The converter goes into DCM when R ;gt; RCRIT = 2? L which is (1 ? D) ? TS 20 dependent on duty cycle, inductance and switching period.

The analysis will continue with the two known quantities based on the inductor volt-second balance and capacitor charge balance in equations (14) and (15) respectively [3]. From inductor volt second balance: 1 ;lt; v L ;gt;= TS TS ?v 0 L (t ) ? dt = 0 (14) From capacitor charge balance: ;lt; iC ;gt;= 1 S iC (t ) ? dt = 0 TS ? 0 T (15) Solving for vL leads to finding the value of the output voltage as shown in (16) V = n ? Vg ? D1 D1 + D2 (16) The inductor current value can be calculated as shown in equation (17) and replacing iL with (8) the result is shown in (18).

D1 ? TS ( D1 + D2 )(n ? Vg ? V ) 2? L iL = (17) (18) V D1 ? TS = ( D1 + D2 )(n ? Vg ? V ) R 2? L 2 ? L D1 ( D1 + D2 )(n ? Vg ? V ) = R ? TS V Substituting V from (16) in equation (19) is derived in (20): D1 ? n 2 ? Vg ? D1 ? n ? Vg ? V 2? L = R ? TS V2 2 2 2 (19) (20) Where K = 2? L R ? TS 21 The condition whether the converter is operating in DCM or CCM is dependent only on input voltage, output voltage and the duty cycle. The conversion ratio is derived in (21) and (22) for CCM and DCM operation respectively [3]. M = D For CCM M= 2 4? K 1+ 1+ 2 D (21) For DCM (22)

The dependency of coefficient K as a function of duty cycle for different input voltage values are shown in Figure 2. 4 . 2 K(D) and Kcrit 2 1. 5 K( D , 22) K( D , 28) K( D , 36) Kcrit( D) 1 0. 5 0 0 0 0 0. 1 0. 2 0. 3 0. 4 0. 5 D 0. 6 0. 7 0. 8 0. 9 1 1 Figure 2. 4. Coefficient k as a function of Duty Cycle The behavior of modulation index as a function of duty cycle for different values of K is shown in Figure 2. 5. For DCM case the modulation index is nonlinear (left of the plot) and at CCM it becomes linear. 22 1 0. 8 M ( D , 0. 01) M ( D , 0. 05) M ( D , 0. 1) M ( D , 0. ) M ( D , 0. 6) M [ D , ( 1? D) ] 0. 2 0. 4 0. 6 1? 10 ?3 0 0 1? 10 ?3 0. 2 0. 4 D 0. 6 0. 8 1 Figure 2. 5. Modulation index vs. Duty cycle As can be seen in Figure 2. 4 and Figure 2. 5, the modulation index varies nonlinearly when the converter works under DCM conditions. In order to maintain control of the output for the full-bridge converter, the operation point needs to be known. Equation (20) suggests that by measuring only input and output voltage we can predict in what mode the converter is working and make the necessary adjustments to the modulation index.

The controller modeling will be based on this fact and is explained in detail in Chapter 3. 2. 3 Modeling of the Converter In order to design a controller to meet the given requirements the small signal model of the converter has to be built. Vlatcovic et. al [21] have developed a small signal model for a phase shift full bridge converter but this model is only valid for the CCM operation. The conventional full-bridge topology is derived from the buck converter, and therefore has a very similar small signal model. The phase-shifted version is also similar to the buck, but slightly more complex.

The main difference comes from the effective duty cycle that the phase-shifted converter sees, which is shown in equation (23). 23 Deff ? Ns ? ? ? ? N p (2 I L ? V D ‘ Ts ) ? = D ? ?D = D ? ? Vin Ts Lf 2 ? ? ? ? Llk 2 ? (23) The above relationship suggests that the effective duty cycle is a function of leakage inductance, filter inductance and input and output voltages. Because the full bridge converter behaves just like a regular converter when working in DCM it is possible to design a model that can distinguish between these two modes of operation.

To help this case Tsai [22] has developed an average model of the phase shifted PWM converter. This model was developed on the assumptions that all the switches are ideal, inductor ripple current is linear and that the ripple output voltage is zero. The behavior of the full bridge converter changes radically when the converter’s operation changes from CCM to DCM mode. The average switch model from which the model of the converter is derived takes into account this fact of operation point of the converter whether it’s working on CCM or DCM mode.

The converter’s behavior in the discontinuous conduction mode (DCM) is the same as that of a conventional PWM converter since the linear charging/discharging interval of the leakage inductor current no longer exists as illustrated in Figure 2. 6. CCM ~ vcp deff TR DCM deff TR ~ ia ~ ic 0 dTR TR 0 d 2TR dTR TR Figure 2. 6. Averaged Switch Model terminal quantities for FB-PWM converter 24 Under the assumptions made above in CCM the relationships are: { { { ~ vcp = 0, ~ ~ ? iC vap ? t ia = + n LLK ,during [0, d LTR ] (24) ~ vap ~ vcp = , n ~ ? iC ia = n ,during [d LTR , dTR ] 25) ~ vcp = 0, ~ ia = 0 ,during [dTR , TR ] (26) ~ Where iC is the averaged value of ic . Variables without an “R” indicate the averaged value of the corresponding quantities over a ripple cycle TR. The relationship in DCM can be summarized as: ~ vap ~ vcp = , n , during [0, dTR ] ~ ~ iC ia = n { (27) { { shown in Figure 2. 7. ~ vcp = 0, , ~ ia = 0 during [dTR , (d + d 2 ) ? TR ] (28) ~ vcp = vcp , , ~ ia = 0 during [(d + d 2 ) ? TR , TR ] (29) From the derivations above the three terminal averaged switch model is derived and 25 ia ic c a vap 1 dc n vcp p Figure 2. 7.

Three-terminal averaged ZVS PWM Switch Model In Figure 2. 6, d c = (d ? d L ) , where (d + d2)=1 for CCM and dL= 0 for DCM case and (d + d 2 ) dL is the duty cycle loss Averaging for one ripple cycle: { { vcp = vap (d ? d L ) n ic ( d ? d L ) ia = n , for CCM where d L = 2 ? LLK ? iC ? f r n ? vap (30) vcp = vap ? d n ? (d + d 2 ) ic d ia = n ? (d + d 2 ) , for DCM where d 2 = 2 ? LF ? iC ? f r ? m d ? vap (31) Using all the relationships shown above the average model of the full-bridge phase shifted PWM converter was derived and implemented in Saber® and shown in Figure 3. 3. 26

Chapter 3 – Controller Design and Converter Simulation This chapter lays the foundation of the work in this thesis report. The chapter starts with the average modeling of the dc-dc converter in both discontinuous and continuous conduction modes (DCM and CCM) of operation. In order to accurately design and control the DC-DC converter it must first be modeled and simulated. From the results of these simulations it is possible to predict the performance of the converter and its controller before building the hardware and make sure that all the selected components meet the requirements. . 1 Controller Design In a fuel cell system the performance of the DC-DC converter is very dependent on the unknown variations of process parameters. These changes will degrade the performance of the converter and as a result it is desirable that the controller not be affected from these disturbances. Although the operation of the phase shifted full bridge converter is well known, its behavior is dependent on some factors that are not known well. Such parameters have to do with the nonlinear behavior of the converter itself.

The transformers turns ratio, the coupling coefficient, the leakage inductance of the transformer, and the series resistance of the filter inductor are some of the parameters that can not be controlled closely and they vary with the load conditions, input source, and operating frequency. All these factors could be controlled to a certain degree with relatively easy controllers, but if a tight performance is expected and the output voltage from the converter is required to be stiff, the controller has to be fast and noise immune and should have good disturbance rejection.

As discussed in the introduction section, the current control methods are fast but are highly sensitive to noise. On the other hand, a voltage mode controller is noise immune, but usually its performance is slow and it does not correct until the disturbance has already taken effect. Sensorless current control (SCM) offers these advantages but it is not practical in the case of higher power rating converters and in the case transformers are present. The SCM method has been implemented only for low level power converters where the 7 sensor isolation is not needed. When a high power inverter is used and the output voltage is higher than that of the DSP voltage levels, the need for isolation is a must. The SCM method also requires a very fast voltage sensor if the method used is identical to the SCM method used by Krein [14, 15]. This sensor is also needed in order to detect whether the converter is working in DCM or CCM mode, as the integration of the inductor voltage waveform needs to be precise if the SCM method is used.

The control model that is developed in this thesis is a combination of the SCM technique developed by Krein [14, 15] and an adjustable model reference control [16, 17]. An average reference model is first developed and a parameter adaptation law is added into the control loop in order to account for the nonlinearities in the converter. This controller has very good disturbance rejection and still maintains speeds comparable to current mode control methods. In this case the voltage sensors do not need to measure high frequency switching values.

Instead we can measure just slow changing DC values and build our model based on these values. The discussion of operation of the full bridge converter suggests that if we know the value of the input voltage, output voltage of the converter and the duty cycle we can determine if the converter is working in DCM or CCM mode. This relationship between the input output voltage and duty cycle is given in equation (32) below. K= D1 ? n 2 ? Vg ? D1 ? n ? Vg ? V 2? L = R ? TS V2 2 2 2 (32)

The input and output voltages of the converter can be measured by using relatively simple isolated voltage sensors and the information on the duty cycle already known because this is the signal generated by the DSP. So to develop a good control scheme that meets the requirements it is sufficient to measure just the input and output voltages. 3. 1. 1 Development of the control scheme Since the phase shift controller chip TI UCC3895 [9] only uses a reference voltage in order to generate internally the phase shifting function there is no necessity to generate a triangular waveform to be used as in the peak current mode control fashion.

Instead an averaged method should compensate for the control of this converter. The building of the control law starts by creating a reference model using the ideas from the 28 SCM technique. In the full bridge converter the inductor voltage would be the difference between Vd – Vout. The average value of Vd is estimated as Vd = n ? Vin ? M , where M is the modulation index, n is the number of turns in the transformer and Vin is the value of the input voltage. Since the average value of the inductor voltage is zero, this value is equal to the output voltage.

This assumes that the inductor is ideal and there is no voltage drop due to the series resistance of the inductor. Since the output voltage has to be equal to a reference voltage the substitution of the output state value by the reference value is made in the same fashion as in SCM. By adding a compensator we achieve an average control scheme that we were looking for. The implementation scheme for this control method is shown in Figure 3. 1. In this block diagram the input voltage is read and is multiplied by the number of turns of the full-bridge DC-DC transformer.

The information from the input and output voltages are used to determine whether the converter is working in the DCM or CCM mode and the appropriate action is taken. Based on this observation the correct value of the modulation index is delivered which multiplies n ? Vin value where n is the transformer turns ratio. This is similar to feed-forward control schemes but in this case a plant model is being used. VIN n Ym M VREF Compensator DCM/ CCM d VOUT VIN FB-PS-PWM Converter PWM Controller d Figure 3. 1. Block Diagram Model Reference Controller 29

If series resistance of the filter inductor is zero, the transformer is ideal and the number of turns is exact, the scheme works well and the output voltage follows the generated Ym model very closely with no steady state error. When the value of the inductor’s series resistance is not zero and in most cases not known exactly the voltage drop in the inductor needs to be compensated. At the same time because of the nonlinearity of the transformer for all the load range the scheme has a steady state error that is basically the difference between the plant output and the model Ym.

To compensate for this error an adaptive control mechanism is designed. This mechanism takes into account the difference between the output voltage and the model reference and acts appropriately by changing a coefficient dynamically. The mechanism adjusts the difference between the model and the real output. The speed of this mechanism does not need to be very fast and it is implemented by using a simple integrator with limiting. This mechanism compensates for not only on the inductor voltage drop but also the little difference that might be created by not having the exact number of turns.

In this case the transformer number of turns can be adjusted appropriately and in the case when the transformer is not ideal this would be a preferred technique. The implementation of the adjusting mechanism is shown in Figure 3. 2 VIN n Ym + ? Compensator M 1/s VREF Adjusting Mechanism DCM/ CCM d + ? VOUT V IN FB-PS-PWM Converter PWM Controller d Figure 3. 2. Block Diagram of the controller with the adjusting closed loop control in place. 30 In Figure 3. 2 VIN and VOUT are the voltage sensor readings, n is the transformer turns ratio.

Duty cycle d in this case is a control value upon which the PWM controller creates the appropriate phase shifting effect. The compensator is a third order compensator and is described in detail in the following section. 3. 2 Simulation Saber® was the chosen tool because of the advantages of having better programming options and better convergence in comparison to Pspice or Simplorer. Using this software tool it is possible to perform transient and frequency analysis in the same circuit. 3. 2. 1 Average Model Simulations The average circuit model for the converter is shown in Figure 3. 3.

The average model of the Full-Bridge Phase shifted PWM converter is done in Saber®. The design work is done starting with the average model because the simulation time is shorter and that with the average model it is possible to simulate for frequency response as well. The average circuit model shown in Figure 3. 3 is based on the development if the average switch model and the small signal models [21, 22]. Figure 3. 3. Saber® Model for the PS-FB-PWM Converter First the open loop circuit is simulated in order to verify that the modeling is done correctly for both DCM and CCM operation. 31

Using the average model circuit shown in Figure 3. 4, after determining the steady state operation point the control to output transfer functions for both DCM and CCM operation are simulated and shown in Figure 3. 4 and Figure 3. 5. Figure 3. 4. Control-to-output transfer function in CCM. Figure 3. 5. Control-to-output transfer function for DCM operation. These simulations are carried out to verify that the modeling of the converter is done correctly according to Tsai findings [22]. The model is also verified with the 32 converter parameters as in [22] and the performance is identical.

Once the open loop simulation is determined to be correct the controller modeling starts. The controller is modeled based on the block diagram shown in Figure 3. 2 and the converter is represented by its average model. Simulations are carried out for both CCM and DCM cases. Since the design in DCM operation is more challenging the primary design is done in this mode of operation and then using the same controller the operation in CCM is verified. This is a common practice in power electronics designs. The closed loop design procedure started with the design shown in Figure 3. 6.

Afterwards the adjusting mechanism was implemented and the final simulation circuit of the averaged model is shown in Figure 3. 6. Figure 3. 6. Average Model with the Implemented Control Scheme. When designing the compensator before closing the loop a simple PI controller was implemented. The idea was to first find out what the response of the converter would be and take the appropriate actions upon the understanding of its performance. The simulation in DCM mode brought an interesting fact that suggests that the output voltage follows the model very closely although the overall performance is not what it is expected.

This performance where the output voltage follows the model is shown Figure. The performance also suggests that the converter is very close to being marginally stable and that the margins are very small. 33 Figure 3. 7. Closed loop performance with a PI controller. In order to verify that this assumption is correct the frequency response of the converter was simulated and shown in Figure 3. 8. The phase margin is only 9. 2o. This explains why when using a simple PI controller the oscillations are present. Figure 3. 8. Loop Gain Frequency response with simple PI controller.

To improve the performance a lead factor is added into the compensator block [23, 24]. The purpose is to improve the phase margin and increase the crossover 34 frequency and the bandwidth of the controller. The compensator after adding the lead factor has the following form: 3500( s + 1500)( s + 15) s 2 ( s + 15000) C ( s) = ? (33) The performance of the design is greatly improved, the phase margin is at PM = 66. 8o, and the gain margin at GM = 32. 6 dB and a crossover frequency fc = 1580 Hz. Figure 3. 9. Improved performance (lead factor added)

The transient response of the closed loop system is shown in Figure 3. 10. In this result an input voltage step and a load step are simulated and as seen by this performance the input voltage step as well as the output load change do not affect the output. However, because the control of this converter is implemented using a DSP there is some delay that is added into the performance. 35 Vout Ym Figure 3. 10. Transient performance with the improved controller This delay first was estimated to be equal to two switching periods. As it turned out this was a good estimate because when the controller was later

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